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19-3587; Rev 0; 2/05
Pin-Selectable, Hex Power-Supply Supervisory Circuit
General Description
The MAX6886 pin-selectable, multivoltage supply supervisor monitors six voltage-detector inputs and one watchdog input, asserting a RESET when inputs drop below the selected voltage thresholds or the watchdog timer expires. Manual reset and margin disable inputs offer additional flexibility. Five logic inputs select the MAX6886 thresholds. Logic inputs select a supply tolerance (5% or 10%) and 1 of 32 factory-set threshold settings. Connect external capacitors or use the factory default setting to set the watchdog timeout periods and reset time delay. The MAX6886 is available in a 20-pin thin QFN (5mm x 5mm x 0.8mm) package and operates over the extended -40C to +85C temperature range.
Features
32 Pin-Selectable Undervoltage Detector Thresholds Capacitor-Adjustable Reset and Watchdog Timeout Periods Factory Default Reset and Watchdog Timeout Periods Margining Disable and Manual Reset Controls -40C to +85C Operating Temperature Range Small 5mm x 5mm 20-Pin Thin QFN Package Few External Components 1% Threshold Accuracy
MAX6886
Applications
Multivoltage Systems Telecom Networking Servers/Workstations/Storage Systems
Pin Configuration appears at end of data sheet.
PART MAX6886ETP
Ordering Information
TEMP RANGE -40C to +85C PIN-PACKAGE 20 Thin QFN PKG CODE T2055-5
Typical Operating Circuit
12V DC-DC 1 DC-DC 2 DC-DC 3 12V 5V 3.3V 2.5V DC-DC 4 1.5V 1.2V 1.8V
IN1 3.3V ALWAYS ON VCC
IN2
IN3
IN4
IN5
IN6 RESET WDI MARGIN RESET LOGIC OUTPUT P
DBP TH0 TH1 TH2 TH3 TH4
MAX6886
MR SRT SWT GND
________________________________________________________________ Maxim Integrated Products
1
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Pin-Selectable, Hex Power-Supply Supervisory Circuit MAX6886
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND.) IN1-IN6, VCC, RESET, SRT, SWT .............................-0.3V to +6V TH0-TH4, WDI, MR, MARGIN ..................................-0.3V to +6V DBP ..........................................................................-0.3V to +3V Input/Output Current (all pins)..........................................20mA Continuous Power Dissipation (TA = +70C) 20-Pin 5mm x 5mm Thin QFN (derate 21.3mW/C above +70C) .............................1702mW Maximum Junction Temperature .....................................+150C Operating Temperature Range ...........................-40C to +85C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN1-VIN4 or VCC = 2.7V to 5.8V, WDI = GND, TH0-TH4 = MARGIN = MR = DBP, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Notes 1, 2)
PARAMETER Operating Voltage Range (Note 3) Supply Current Digital Bypass Voltage Threshold Accuracy (Table 2) Threshold Hysteresis Threshold Tempco IN_ Input Impedance IN_ Input Leakage Current Power-Up Delay IN_ to RESET Delay Reset Default Timeout Period Reset Adjustable Timeout Period SRT Adjustable Timeout Current SRT Default Timeout Threshold SRT Adjustable Timeout Threshold SRT Adjustable Timeout Discharge Threshold SRT Adjustable Timeout OutputLow Discharge Current RESET Output Low RESET Output Open-Drain Leakage Current ICC VDBP VTH VTH-HYS VTH/C RIN IIN tD-PO tD-R tRP tRP-ADJ ISRT VSRT-DEF VSRT-ADJ VSRT-DIS ISRT-DIS VOLRESET ILKG For VIN_ < highest VIN1-IN4 and VIN_ < VCC (not ADJ), thresholds are not set as adjustable IN5, IN6 IN1-IN4 set as adjustable thresholds VCC 2.5V IN_ falling/rising, 100mV overdrive VSRT = VCC CSRT = 47nF VSRT = GND VSRT VSRT-DEF, selects reset default (Note 4) (Note 5) VSRT = 0.3V ISINK = 4mA, output asserted Output tri-stated -1 0.7 0.4 +1 180 135 180 1.1 0.95 130 -150 IN1-IN6, IN_ falling TA = +25oC to +85oC TA = -40oC to +85oC SYMBOL CONDITIONS Voltage on either one of IN1-IN4 or VCC to guarantee the part is fully operational VIN1 = 5.8V, IN2-IN6 = GND, no load 2.48 -1 -1.5 0.3 10 200 300 +150 2.5 20 200 207 230 1.25 1.00 100 220 280 280 1.5 1.05 MIN 2.7 0.9 2.55 TYP MAX 5.8 1.2 2.67 +1 +1.5 UNITS V mA V % VTH % VTH ppm/C k nA ms s ms ms nA V V mV mA V A
2
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Pin-Selectable, Hex Power-Supply Supervisory Circuit
ELECTRICAL CHARACTERISTICS (continued)
(VIN1-VIN4 or VCC = 2.7V to 5.8V, WDI = GND, TH0-TH4 = MARGIN = MR = DBP, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Notes 1, 2)
PARAMETER MR, MARGIN, TH0-TH4, WDI Input Voltage MR Input Pulse Width MR Glitch Rejection MR to RESET Delay MR to Internal DBP Pullup Current MARGIN to Internal DBP Pullup Current TH0-TH4 Input Current WDI Pulldown Current WDI Input Pulse Width Watchdog Default Timeout Period Watchdog Adjustable Timeout Period SWT Adjustable Timeout Current SWT Default Timeout Threshold SWT Adjustable Timeout Threshold SWT Adjustable Timeout Discharge Threshold SWT Adjustable Timeout OutputLow Discharge Current IWDI tWDI tWD tWD-ADJ ISWT VSWT-DEF VSWT-ADJ VSWT-DIS ISWT-DIS VSWT = VCC CSWT = 0.33F SWT = GND VSWT VSWT-DEF, selects watchdog default timeout (Note 4) (Note 5) VSWT = 0.3V 0.7 Initial mode Normal mode Initial mode Normal mode VWDI = 0.6V tD-MR IMR IMARGIN VMR = 1.4V VMARGIN = 1.4V 5 5 -100 5 50 92.16 1.44 53.7 0.93 180 1.1 0.95 102.4 1.6 82.5 1.43 230 1.25 1.00 100 112.64 1.76 111.9 1.94 280 1.5 1.05 10 SYMBOL VIL VIH tMR 1.4 1 100 200 10 10 15 15 +100 15 CONDITIONS MIN TYP MAX 0.6 UNITS V s ns ns A A nA A ns s s nA V V mV mA
MAX6886
Note 1: Note 2: Note 3: Note 4: Note 5:
Device may be supplied from IN1-IN4 or VCC. 100% production tested at TA = +25C and TA = +85C. Specifications at TA = -40C are guaranteed by design. The internal supply voltage, measured at VCC, equals the maximum of IN1-IN4. External capacitor is charged by IS_T when VS_T-DIS < VS_T < VS_T-ADJ. External capacitor is discharged by IS_T-DIS down to VS_T-DIS after VS_T reaches VS_T-ADJ.
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Pin-Selectable, Hex Power-Supply Supervisory Circuit MAX6886
Typical Operating Characteristics
(VIN1-VIN4 or VCC = 5V, WDI = GND, TH0-TH4 = MARGIN = MR = DBP, TA = +25C, unless otherwise noted.)
IN1-IN4 SUPPLY CURRENT vs. IN1-IN4 SUPPLY VOLTAGE
MAX6886 toc01
VCC SUPPLY CURRENT vs. VCC SUPPLY VOLTAGE
MAX6886 toc02
RESET TIMEOUT PERIOD vs. TEMPERATURE (DEFAULT tRP = 200ms)
215 TIMEOUT PERIOD (ms) 210 205 200 195 190
MAX6886 toc03
1.00 0.95 SUPPLY CURRENT (mA) 0.90 0.85 0.80 0.75 0.70 2.6 3.6 4.6 5.6 SUPPLY VOLTAGE (V) TA = -40C TA = +25C
1.00 0.95 SUPPLY CURRENT (mA) TA = +85C 0.90 0.85 0.80 0.75 0.70 2.6 3.6 4.6 5.6 SUPPLY VOLTAGE (V) TA = -40C TA = +25C
220
TA = +85C
185 180 -40 -15 10 35 60 85 TEMPERATURE (C)
IN_ TO RESET PROPAGATION DELAY vs. TEMPERATURE
MAX6886 toc04
WATCHDOG TIMEOUT PERIOD vs. TEMPERATURE (DEFAULT tWD = 1.6s)
MAX6886 toc05
NORMALIZED IN_ THRESHOLD vs. TEMPERATURE
1.004 NORMALIZED IN_ THRESHOLD 1.003 1.002 1.001 1.000 0.999 0.998 0.997 0.996 0.995
MAX6886 toc06
30 29 PROPAGATION DELAY (s) 28 27 26 25 24 23 22 21 20
100mV OVERDRIVE
1.700 1.675 TIMEOUT PERIOD (s) 1.650 1.625 1.600 1.575 1.550 1.525 1.500
1.005
-40
-15
10
35
60
85
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (C)
TEMPERATURE (C)
TEMPERATURE (C)
MAXIMUM IN_ TRANSIENT vs. IN_ THRESHOLD OVERDRIVE
MAX6886 toc07
OUTPUT-VOLTAGE LOW vs. SINK CURRENT
350 OUTPUT-VOLTAGE LOW (mV) 300 250 200 150 100 50 0
MAX8666 toc08
200 MAXIMUM TRANSIENT DURATION (s) 175 150 125 100 75 50 25 0 1 10 100 RESET ASSERTS ABOVE THIS LINE
400
1000
0
2
4
6
8
10
12
14
IN_ THRESHOLD OVERDRIVE (mV)
SINK CURRENT (mA)
4
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Pin-Selectable, Hex Power-Supply Supervisory Circuit
Typical Operating Characteristics (continued)
(VIN1-VIN4 or VCC = 5V, WDI = GND, TH0-TH4 = MARGIN = MR = DBP, TA = +25C, unless otherwise noted.)
MR TO RESET OUTPUT PROPAGATION DELAY vs. TEMPERATURE
MAX6886 toc09
MAX6886
RESET TIMEOUT PERIOD vs. TEMPERATURE (CRST = 0.047F)
MAX6886 toc10
WATCHDOG TIMEOUT PERIOD vs. TEMPERATURE (CSWT = 0.33F)
1.9 1.8 TIMEOUT PERIOD (s) 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0
MAX6886 toc11
3.00 2.75 PROPAGATION DELAY (s) 2.50 2.25 2.00 1.75 1.50 1.25 1.00 -40 -15 10 35 60
200 190 180 TIMEOUT PERIOD (ms) 170 160 150 140 130 120 110 100
2.0
85
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (C)
TEMPERATURE (C)
TEMPERATURE (C)
RESET TIMEOUT PERIOD vs. CSRT
MAX6886 toc12
WATCHDOG TIMEOUT PERIOD vs. CSWT
MAX6886 toc13
10,000
10,000
1000 TIMEOUT PERIOD (ms)
1000 TIMEOUT PERIOD (ms)
100
100
10
10
1
1
0.1 0.1 1 10 CSRT (nF) 100 1000
0.1 0.1 1 10 CSWT (nF) 100 1000
Pin Description
PIN NAME FUNCTION Open-Drain, Active-Low Reset Output. RESET asserts when any input voltage falls below the selected threshold, the watchdog timer expires, or when MR is pulled low. RESET remains asserted for default (200ms) or adjustable reset timeout period after all assertion-causing conditions are cleared. An external pullup resister is required. Reset Timeout Adjust Input. Connect an external capacitor between SRT and GND to set the reset timeout period. The timeout period is calculated by tRP = 4.348E6 x CSRT (tRP in seconds and CSRT in Farads). To use the factory default period of 200ms connect SRT to VCC. Watchdog Timeout Adjust Input. Connect an external capacitor between SWT and GND to set the watchdog timeout period. The adjustable timeout period is calculated by tWD = 4.348E6 x CSWT (tWD in seconds and CSWT in Farads). Disable the watchdog timer by connecting SWT to GND. Connect SWT to VCC to use the factory-default normal and initial periods of 1.6s and 102.4s, respectively.
1
RESET
2
SRT
3
SWT
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Pin-Selectable, Hex Power-Supply Supervisory Circuit MAX6886
Pin Description (continued)
PIN 4 5 NAME GND WDI Ground Watchdog Timer Input. Logic input for the watchdog timer function. If WDI is not strobed with a valid low-to-high or high-to-low transition within the selected timeout period, RESET asserts. WDI is internally pulled down to GND through a 10A current sink. Active-Low Manual Reset Input. Pull MR low to assert RESET. RESET will remain asserted for its preset/adjustable reset timeout period when MR is driven high. Leave MR unconnected or connect to DBP if unused. MR is internally pulled up to DBP through a 10A current source. Margin Input. When MARGIN is pulled low, RESET is held in its existing state independent of subsequent changes in monitored input voltages or the watchdog timer expiration. MARGIN is internally pulled up to DBP through a 10A current source. MARGIN overrides MR if both are asserted at the same time. Threshold Selection Input 4. Logic input to select desired threshold. Connect TH4 to GND or DBP. See Table 2 for available thresholds. Input has no internal pullup or pulldown. Threshold Selection Input 3. Logic input to select desired threshold. Connect TH3 to GND or DBP. See Table 2 for available thresholds. Input has no internal pullup or pulldown. Threshold Selection Input 2. Logic input to select desired threshold. Connect TH2 to GND or DBP. See Table 2 for available thresholds. Input has no internal pullup or pulldown. Threshold Selection Input 1. Logic input to select desired threshold. Connect TH1 to GND or DBP. See Table 2 for available thresholds. Input has no internal pullup or pulldown. Threshold Selection Input 0. Logic input to select desired threshold. Connect TH0 to GND or DBP. See Table 2 for available thresholds. Input has no internal pullup or pulldown. Internal Power-Supply Voltage. Bypass VCC to GND with a 1F ceramic capacitor as close to the device as possible. VCC supplies power to the internal circuitry. VCC is internally powered from the highest of the monitored IN1-IN4 voltages. Do not use VCC to supply power to external circuitry. To externally supply VCC, see the Powering the MAX6886 section. Digital Bypass Voltage. The internally generated voltage at DBP supplies power to internal logic and output RESET. Connect a 1F capacitor from DBP to GND as close to the device as possible. Do not use DBP to supply power to external circuitry. Input Voltage Detector 6. Select the undervoltage threshold using TH0-TH4. See Table 2. IN6 cannot supply power to the device. For improved noise immunity, bypass IN6 to GND with a 0.1F capacitor installed as close to the device as possible. Input Voltage Detector 5. Select the undervoltage threshold using TH0-TH4. See Table 2. IN5 cannot supply power to the device. For improved noise immunity, bypass IN5 to GND with a 0.1F capacitor installed as close to the device as possible. Input Voltage Detector 4. Select the undervoltage threshold using TH0-TH4. See Table 2. For improved noise immunity, bypass IN4 to GND with a 0.1F capacitor installed as close to the device as possible. Power the device through IN1-IN4 or VCC (see the Powering the MAX6886 section). Input Voltage Detector 3. Select the undervoltage threshold using TH0-TH4. See Table 2. For improved noise immunity, bypass IN3 to GND with a 0.1F capacitor installed as close to the device as possible. Power the device through IN1-IN4 or VCC (see the Powering the MAX6886 section). Input Voltage Detector 2. Select the undervoltage threshold using TH0-TH4. See Table 2. For improved noise immunity, bypass IN2 to GND with a 0.1F capacitor installed as close to the device as possible. Power the device through IN1-IN4 or VCC (see the Powering the MAX6886 section). Input Voltage Detector 1. Select the undervoltage threshold using TH0-TH4. See Table 2. For improved noise immunity, bypass IN1 to GND with a 0.1F capacitor installed as close to the device as possible. Power the device through IN1-IN4 or VCC (see the Powering the MAX6886 section). Exposed Paddle. Internally connected to GND. Connect EP to GND or leave floating. FUNCTION
6
MR
7
MARGIN
8 9 10 11 12
TH4 TH3 TH2 TH1 TH0
13
VCC
14
DBP
15
IN6
16
IN5
17
IN4
18
IN3
19
IN2
20 --
IN1 EP
6
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Pin-Selectable, Hex Power-Supply Supervisory Circuit
Functional Diagram
MARGIN
MAX6886
WDI
IN1
*IN_ DETECTOR
SWT
DBP
SRT
IN2 IN3 IN4 IN5 IN6
IN2 DETECTOR IN3 DETECTOR LOGIC ARRAY IN4 DETECTOR IN5 DETECTOR IN6 DETECTOR
DBP RESET
MR TH0 TH1 VCC 1F 2.55V LDO DBP 1F VIRTUAL DIODES REFERENCE TH2 TH3 TH4
MAX6886
*SEE THE VOLTAGE-DETECTOR INPUTS (IN_) SECTION FOR ADJUSTABLE INPUTS. GND
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Pin-Selectable, Hex Power-Supply Supervisory Circuit MAX6886
Detailed Description
The MAX6886 pin-selectable, multivoltage supply supervisor monitors six voltage-detector inputs and one watchdog input. RESET asserts when any of the configured input thresholds have been reached, MR is asserted, or the watchdog timer expires. MARGIN allows a system to be tested without RESET being asserted. Logic inputs TH0-TH4 select 1 of 32 threshold sets for inputs IN1-IN6 (see Table 2, Threshold Options). Inputs in Table 2 that contain ADJ for inputs allow external resistor voltage-dividers to be connected to create additional thresholds. RESET is an open-drain acitve-low output and asserts when MR is low, the watchdog timer expires, or any voltage at IN1-IN6 falls below its respective threshold. The default RESET time delay is 200ms and custom timeout periods are set by connecting an external capacitor from SRT to GND. The default watchdog normal and initial timeout periods are 1.6s and 102.4s, respectively. The normal and initial watchdog timeout periods can be adjusted by connecting an external capacitor from SWT to GND.
Inputs
The MAX6886 contains multiple logic and voltagedetector inputs. Each voltage-detector input is monitored for undervoltage thresholds. Voltage-Detector Inputs (IN_) The MAX6886 offers several monitor options with both pin-selectable and adjustable reset thresholds. The threshold voltage at each adjustable IN_ input is typically 0.6V. To monitor a voltage >0.6V, connect a resistor-divider network to the circuit as shown in Figure 1. VIN_TH = VTH (R1 + R2) / R2 (Equation 1) where VIN_TH is the desired reset threshold voltage for the respective IN_ and VTH is the input threshold (0.6V). Resistors R1 and R2 can have very high values to minimize current consumption due to low-leakage currents. Set R 2 to some conveniently high value (10k, for example) and calculate R1 based on the desired reset threshold voltage, using the following formula: R1 = R2 x (VIN_TH/VTH - 1) Threshold Logic Inputs (TH0-TH4) The TH0-TH4 logic inputs select the undervoltage thresholds and tolerance of the IN1-IN6 voltage-detector inputs. TH0-TH4 define 32 unique options for the supervisor functionality. Connect the respective TH_ to GND for a logic 0 or to DBP for a logic 1. Tables 1 and 2 show the 32 unique threshold options available. TH4 sets the threshold tolerance of the undervoltage threshold. A logic 1 selects a 5% supply tolerance and a logic 0 selects a 10% supply tolerance. The MAX6886 logic determines which thresholds should be used for
Powering the MAX6886
The MAX6886 derives power from the voltage-detector inputs IN1-IN4 or through an externally supplied VCC. A virtual diode-ORing scheme selects the positive input that supplies power to the device (see the Functional Diagram). The highest input voltage on IN1-IN4 supplies power to the device. One of IN1-IN4 must be at least 2.7V to ensure proper operation. Internal hysteresis ensures that the supply input that initially powered the device continues to power the device when multiple input voltages are within 50mV of each other. VCC powers the analog circuitry and is the bypass connection for the MAX6886 internal supply. Bypass VCC to GND with a 1F ceramic capacitor installed as close to the device as possible. The internal supply voltage, measured at VCC, equals the maximum of IN1-IN4. If VCC is externally supplied, VCC must be at least 200mV higher than any voltage applied to IN1-IN4 and VCC must be brought up first. V CC always powers the device when all IN_ are factory set as "ADJ." Do not use the internally generated VCC to provide power to external circuitry. The MAX6886 generates a digital supply voltage at DBP for the internal logic circuitry and RESET. Bypass DBP to GND with a 1F ceramic capacitor installed as close to the device as possible. The nominal DBP output voltage is 2.55V. Do not use DBP to provide power to external circuitry.
8
VIN R1 IN_ MAX6886
R2 0.6V
Figure 1. Adjusting the Monitored Threshold
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Pin-Selectable, Hex Power-Supply Supervisory Circuit
the IN inputs only at power-up. Use the voltage-divider circuit of Figure 1 and Equation 1 to set the threshold for the user-adjustable inputs as described in the Voltage-Detector Inputs (IN_) section. Manual Reset (MR) Many microprocessor-based (P) products require manual reset capability to allow an operator or external logic circuitry to initiate a reset. The manual reset input (MR) can be connected directly to a switch without an external pullup resistor or debouncing network. MR is internally pulled up to DBP. Leave unconnected if not used. MR is internally pulled up to DBP through a 10A current source. MR is designed to reject fast, falling transients (typically 100ns pulses) and must be held low for a minimum of 1s to assert RESET. After MR transitions from low to high, RESET remains asserted for the duration of its timeout period.
MAX6886
Table 1. Nominal Monitored Supply Voltages
SELECTION TH4-TH0* 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 11111 11110 11101 11100 11011 11010 11001 11000 10111 10110 10101 10100 10011 10010 10001 10000 01111 01110 01101 01100 01011 01010 01001 01000 00111 00110 00101 00100 00011 00010 00001 00000 NOMINAL SUPPLY VOLTAGES (V) IN1 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 3.3 3.0 3.3 3.0 3.3 3.0 3.3 3.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 3.3 3.0 3.3 3.0 3.3 3.0 3.3 ADJ IN2 3.3 3.0 3.3 3.0 3.3 3.0 3.3 3.0 2.5 2.5 2.5 2.5 1.8 1.8 2.5 2.5 3.3 3.0 3.3 3.0 3.3 3.0 3.3 3.0 2.5 2.5 2.5 2.5 1.8 1.8 2.5 ADJ IN3 2.5 2.5 2.5 2.5 1.8 1.8 ADJ ADJ 1.8 1.8 ADJ ADJ ADJ ADJ 1.8 1.8 2.5 2.5 2.5 2.5 1.8 1.8 ADJ ADJ 1.8 1.8 ADJ ADJ ADJ ADJ 1.8 ADJ IN4 1.8 1.8 ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ 1.5 1.5 1.8 1.8 ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ 1.5 ADJ IN5 ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ IN6 ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ SUPPLY TOLERANCE (%) 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 --
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Pin-Selectable, Hex Power-Supply Supervisory Circuit MAX6886
Table 2. Threshold Options
SELECTION 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 TH4-TH0* 11111 11110 11101 11100 11011 11010 11001 11000 10111 10110 10101 10100 10011 10010 10001 10000 01111 01110 01101 01100 01011 01010 01001 01000 00111 00110 00101 00100 00011 00010 00001 00000 THRESHOLD VOLTAGES (V) IN1 4.62 4.62 4.62 4.62 4.62 4.62 4.62 4.62 3.06 2.78 3.06 2.78 3.06 2.78 3.06 2.78 4.38 4.38 4.38 4.38 4.38 4.38 4.38 4.38 2.88 2.62 2.88 2.62 2.88 2.62 2.88 0.60 IN2 3.06 2.78 3.06 2.78 3.06 2.78 3.06 2.78 2.31 2.31 2.31 2.31 1.67 1.67 2.31 2.31 2.88 2.62 2.88 2.62 2.88 2.62 2.88 2.62 2.19 2.19 2.19 2.19 1.58 1.58 2.19 0.60 IN3 2.31 2.31 2.31 2.31 1.67 1.67 0.60 0.60 1.80 1.80 0.60 0.60 0.60 0.60 1.67 1.67 2.19 2.19 2.19 2.19 1.58 1.58 0.60 0.60 1.80 1.80 0.60 0.60 0.60 0.60 1.58 0.60 IN4 1.67 1.67 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 1.39 1.39 1.58 1.58 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 1.31 0.60 IN5 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 IN6 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60 0.60
*TH4 = `1' selects 7.5% threshold tolerance, TH4 = `0' selects 12.5% threshold tolerance. Contact factory for alternative thresholds.
10
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Pin-Selectable, Hex Power-Supply Supervisory Circuit
Margin Output Disable (MARGIN) MARGIN allows system-level testing while power supplies exceed the normal operating ranges. Drive MARGIN low to hold RESET in its existing state while system-level testing occurs. Leave MARGIN unconnected or connect to DBP if unused. An internal 10A current source pulls MARGIN to DBP. MARGIN overrides MR if both are asserted at the same time. Connect a capacitor from SWT to GND to determine the normal watchdog timeout period according to the following equation: CSWT = t WD 4.348 x 106
MAX6886
Watchdog Timer
The MAX6886's watchdog circuit monitors the P's activity. If the P does not toggle the watchdog input (WDI) within the watchdog timeout period, RESET asserts. The internal watchdog timer is cleared by a reset, or by a transition at WDI (which can detect pulses as short as 50ns.) The watchdog timer remains cleared while RESET is asserted. The timer starts counting as soon as RESET goes high (see Figure 2). The MAX6886 features two modes of watchdog timer operation: normal and initial modes. At power-up, after a reset event, or after the watchdog timer expires, the initial watchdog timeout is active (tWDI). After the first transition on WDI, the normal watchdog timeout is active (tWD). The initial and normal watchdog timeouts are determined by the value of the capacitor connected between SWT and ground. The initial watchdog timeout is approximately 64 times the normal watchdog timeout.
where tWD is in seconds and CSWT is in Farads. As an example, a 1F capacitor gives a normal timeout period of 4.68s and an initial watchdog timeout period of approximately 4.5 minutes. Connect SWT to VCC to use the factory-default watchdog normal and initial timeouts of 1.6s and 102.4s, respectively. Choose a low-leakage capacitor for C SWT. Disable the watchdog timer by connecting SWT to GND. WDI is internally pulled down to GND through a 10A current sink.
RESET Output
The reset output is typically connected to the reset input of a P. A P's reset input starts or restarts the P in a known state. RESET goes low whenever one or more input voltage (IN1-IN6) monitors drop below their respective thresholds, when MR is pulled low for a minimum of 1s, or when the watchdog timer expires. RESET remains low for its reset timeout period (tRP) after all assertion-causing conditions have been cleared (see Figure 2).
2.5V VCC OR IN1-IN4
RESET WDI tD-PO tRP *tWDI tWD tRP *tWDI
*tWDI IS THE INITIAL WATCHDOG TIMER PERIOD.
Figure 2. Watchdog, Reset, and Power-Up Timing Diagram
______________________________________________________________________________________
11
Pin-Selectable, Hex Power-Supply Supervisory Circuit MAX6886
Set the RESET time delay by connecting a capacitor from SRT to GND using the following equation: t WD CSRT = 4.348 x 106 where tRP is in seconds and CSRT is in Farads. Connect SRT to VCC for a factory-default reset timeout of 200ms. RESET is open-drain and requires an external pullup resistor. RESET remains low for 1V VCC 2.5V.
Applications Information
Layout and Bypassing
For better noise immunity, bypass each of the voltagedetector inputs to GND with 0.1F capacitors installed as close to the device as possible. Bypass VCC and DBP to GND with 1F capacitors installed as close to the device as possible.
Pin Configuration
PROCESS: BiCMOS
TOP VIEW
IN1 IN4 IN2 IN3 IN5
Chip Information
20
RESET SRT SWT GND WDI
19
18
17
16 15 14
IN6 DBP VCC TH0 TH1
1 2 3 4 5 6
MR
MAX6886
*EXPOSED PAD
13 12 11
7
MARGIN
8
TH4
9
TH3
10
TH2
THIN QFN
*EXPOSED PAD CONNECTED TO GND.
12
______________________________________________________________________________________
Pin-Selectable, Hex Power-Supply Supervisory Circuit
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
QFN THIN.EPS
MAX6886
D2 D D/2 MARKING k L E/2 E2/2 E (NE-1) X e
C L C L
b D2/2
0.10 M C A B
XXXXX
E2
PIN # 1 I.D.
DETAIL A
e (ND-1) X e
PIN # 1 I.D. 0.35x45 DETAIL B
e
L1
L
C L
C L
L
L
e 0.10 C A 0.08 C
e
C
A1 A3
PACKAGE OUTLINE, 16, 20, 28, 32L THIN QFN, 5x5x0.8mm
-DRAWING NOT TO SCALE-
21-0140
G
1
2
______________________________________________________________________________________
13
Pin-Selectable, Hex Power-Supply Supervisory Circuit MAX6886
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
COMMON DIMENSIONS PKG. 16L 5x5 32L 5x5 20L 5x5 28L 5x5 SYMBOL MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. A A1 A3 b D E e k L L1 N ND NE JEDEC 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 0 0.02 0.05 0.20 REF. 0 0.02 0.05 0.20 REF. 0 0.02 0.05 0.20 REF. 0 0.02 0.05 0.20 REF. PKG. CODES T1655-1 T1655-2 T1655N-1 T2055-2 T2055-3 T2055-4 T2055-5 T2855-1 T2855-2 T2855-3 T2855-4 T2855-5 T2855-6 T2855-7 T2855-8 T2855N-1 T3255-2 T3255-3 T3255-4 T3255N-1
EXPOSED PAD VARIATIONS
D2
MIN. NOM. MAX. MIN.
E2
NOM. MAX.
L
0.15
DOWN BONDS ALLOWED
3.00 3.00 3.00 3.00 3.00 3.00 3.15 3.15 2.60 3.15 2.60 2.60 3.15 2.60 3.15 3.15 3.00 3.00 3.00 3.00
3.10 3.20 3.00 3.10 3.20 3.00 3.10 3.20 3.00 3.10 3.20 3.00 3.10 3.20 3.00 3.10 3.20 3.00 3.25 3.25 2.70 3.25 2.70 2.70 3.25 2.70 3.25 3.25 3.10 3.10 3.10 3.10 3.35 3.35 2.80 3.35 2.80 2.80 3.35 2.80 3.35 3.35 3.20 3.20 3.20 3.20 3.15 3.15 2.60 3.15 2.60 2.60 3.15 2.60 3.15 3.15 3.00 3.00 3.00 3.00
3.10 3.20 3.10 3.20 3.10 3.20 3.10 3.20 3.10 3.20 3.10 3.20 3.25 3.25 2.70 3.25 2.70 2.70 3.25 2.70 3.25 3.25 3.10 3.10 3.10 3.10 3.35 3.35 2.80 3.35 2.80 2.80 3.35 2.80 3.35 3.35 3.20 3.20 3.20 3.20
0.25 0.30 0.35 0.25 0.30 0.35 0.20 0.25 0.30 0.20 0.25 0.30 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 0.80 BSC. 0.65 BSC. 0.50 BSC. 0.50 BSC. 0.25 - 0.25 - 0.25 - 0.25 0.30 0.40 0.50 0.45 0.55 0.65 0.45 0.55 0.65 0.30 0.40 0.50 16 4 4 WHHB 20 5 5 WHHC 28 7 7 WHHD-1 32 8 8 WHHD-2 -
** ** ** ** ** ** 0.40 ** ** ** ** ** ** ** 0.40 ** ** ** ** **
NO YES NO NO YES NO Y NO NO YES YES NO NO YES Y N NO YES NO NO
NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE.
** SEE COMMON DIMENSIONS TABLE
5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm FROM TERMINAL TIP. 6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. 7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. 8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. 9. DRAWING CONFORMS TO JEDEC MO220, EXCEPT EXPOSED PAD DIMENSION FOR T2855-1, T2855-3 AND T2855-6. 10. WARPAGE SHALL NOT EXCEED 0.10 mm. 11. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY. 12. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY. PACKAGE OUTLINE, 16, 20, 28, 32L THIN QFN, 5x5x0.8mm
-DRAWING NOT TO SCALE-
21-0140
G
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.

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